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Design and Test Strategies for 2D/3D Integration for NoC-based Multicore Architectures

Af: Kanchan Manna, Jimson Mathew Engelsk Paperback

Design and Test Strategies for 2D/3D Integration for NoC-based Multicore Architectures

Af: Kanchan Manna, Jimson Mathew Engelsk Paperback
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This book covers various aspects of optimization in design and testing of Network-on-Chip (NoC) based multicore systems.  It gives a complete account of the state-of-the-art and emerging techniques for near optimal mapping and test scheduling for NoC-based multicores. The authors describe the use of the Integer Line Programming (ILP) technique for smaller benchmarks and a Particle Swarm Optimization (PSO) to get a near optimal mapping and test schedule for bigger benchmarks. The PSO-based approach is also augmented with several innovative techniques to get the best possible solution. The tradeoff between performance (communication or test time) of the system and thermal-safety is also discussed, based on designer specifications.  

  • Provides a single-source reference to design and test for circuit and system-level approaches to (NoC) based multicore systems;
  • Gives a complete account of the state-of-the-art and emerging techniques for near optimal mapping and test scheduling in (NoC) based multicore systems;
  • Organizes chapters systematically and hierarchically, rather than in an ad hoc manner, covering aspects of optimization in design and testing of Network-on-Chip (NoC) based multicore systems.


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This book covers various aspects of optimization in design and testing of Network-on-Chip (NoC) based multicore systems.  It gives a complete account of the state-of-the-art and emerging techniques for near optimal mapping and test scheduling for NoC-based multicores. The authors describe the use of the Integer Line Programming (ILP) technique for smaller benchmarks and a Particle Swarm Optimization (PSO) to get a near optimal mapping and test schedule for bigger benchmarks. The PSO-based approach is also augmented with several innovative techniques to get the best possible solution. The tradeoff between performance (communication or test time) of the system and thermal-safety is also discussed, based on designer specifications.  

  • Provides a single-source reference to design and test for circuit and system-level approaches to (NoC) based multicore systems;
  • Gives a complete account of the state-of-the-art and emerging techniques for near optimal mapping and test scheduling in (NoC) based multicore systems;
  • Organizes chapters systematically and hierarchically, rather than in an ad hoc manner, covering aspects of optimization in design and testing of Network-on-Chip (NoC) based multicore systems.


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Produktdetaljer
Sprog: Engelsk
Sider: 162
ISBN-13: 9783030313128
Indbinding: Paperback
Udgave:
ISBN-10: 3030313123
Kategori: Elektronik: kredse og komponenter
Udg. Dato: 10 jan 2021
Længde: 0mm
Bredde: 155mm
Højde: 235mm
Forlag: Springer Nature Switzerland AG
Oplagsdato: 10 jan 2021
Forfatter(e): Kanchan Manna, Jimson Mathew
Forfatter(e) Kanchan Manna, Jimson Mathew

Kategori Elektronik: kredse og komponenter

ISBN-13 9783030313128

Sprog Engelsk

Indbinding Paperback

Sider 162

Udgave

Længde 0mm

Bredde 155mm

Højde 235mm

Udg. Dato 10 jan 2021

Oplagsdato 10 jan 2021

Forlag Springer Nature Switzerland AG